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    • Symposium on Integrated Circuits and Systems Design (SBCCI)Conference

    Papers
    Proceedings of the 18th Annual Symposium on Integrated Circuits and System Design
    Carlos Galup-Montoro,Sergio Bampi,Alex Orailoglu
    Symposium on Integrated Circuits and Systems Design (SBCCI)（2005）
    On behalf of the Organizing and Technical Program Committees, the General and Program Chairs warmly welcome all the participants of the 18th Symposium on Integrated Circuits and Systems Design - SBCCI 2005. This year's symposium is being hosted by the Federal University of Santa ...
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    Design of High Speed Digital Circuits with E-TSPC Cell Library
    João Navarro Jr.,Gustavo C. Martins
    Symposium on Integrated Circuits and Systems Design (SBCCI)（2011）
    The application of a standard cells library with Extended True Single Phase Clock (E-TSPC) blocks in the design of high speed digital circuits is analyzed. The E-TSPC technique has been efficiently employed for attaining high speed in digital circuits, mainly in prescalers, but i...
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    Analysis and Implementation of a Stochastic Multiplier for Electrical Power Measurement
    AB Soares,M Negreiros,L Carro,AA Susin
    Symposium on Integrated Circuits and Systems Design (SBCCI)
    In this work the analysis and implementation of an electrical power measurement device using stochastic arithmetic techniques is presented. The device was implemented using programmable logic and a 2-channel AD converter. Simulations and real measurements were obtained in order t...
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    High Throughput Hardware Design for the Adaptive Loop Filter of the Emerging HEVC Video Coding
    Fabiane Rediess,Luciano Volcan Agostini,Cassio Cristani,Pargles Dall'Oglio,Marcelo Schiavon Porto
    Symposium on Integrated Circuits and Systems Design (SBCCI)（2012）
    This work presents a high throughput hardware design for the Adaptive Loop Filter (ALF) cores, a new technique proposed by the High Efficiency Video Coding (HEVC), the emerging video coding standard, in order to improve the subjective video quality. The ALF is a part of the In-Lo...
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    A Bit Scalable Architecture for Fuzzy Processors with Three Inputs and a Flexible Fuzzification Unit
    R d'Amore
    Symposium on Integrated Circuits and Systems Design (SBCCI)（2000）
    This paper describes an architecture of a three input one output bit scalable fuzzy processor. The synthesis is made from a VHDL description. The data path and functional units dimension are defined by a small number of parameters in the highest level entity. The knowledge base a...
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    Runtime QoS Support for MPSoC: a Processor Centric Approach
    Marcelo Ruaro,Everton Alceu Carara,Fernando Gehm Moraes
    Symposium on Integrated Circuits and Systems Design (SBCCI)（2014）
    The MPSoC literature related to runtime support of Quality of Service (QoS) presents proposals related to the management of the interconnection infrastructure and the processing elements (PEs). The QoS management of computation resources is essential to fulfill real-time (RT) app...
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    Ultra-low Power CMOS Cells for Temperature Sensors
    C Rossi,P Aguirre
    Symposium on Integrated Circuits and Systems Design (SBCCI)（2005）
    Temperature sensors and voltage references require cells that generate both PTAT (proportional to absolute temperature) and NTC (negative temperature coefficient) voltages. We present a novel theoretical approach based on a quasi-constant current to obtain these voltages in stand...
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    Direction-Based Fast Mode Decision and Hardware Design for the AV1 Intra Prediction
    Marcel Correa,Daniel Palomino,Guilherme Correa,Luciano Agostini
    Symposium on Integrated Circuits and Systems Design (SBCCI)（2022）
    This work presents a fast decision algorithm and its hardware design for the AV1 intra prediction, inspired on the direction detection algorithm used on the CDEF (Constrained Directional Enhancement Filter) of the same codec. The main objective is to reduce the number of intra ca...
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    ATPG for Fault Diagnosis on Analog Electrical Networks Using Evolutionary Techniques
    CEF Savioli, CEC Szendrodi,JV Calvano, AC Mesquita
    Symposium on Integrated Circuits and Systems Design (SBCCI)（2004）
    This paper proposes a method for automated test pattern generation for fault diagnosis on continuous-time analog electrical networks based on evolutionary techniques. The paper states a method for coding a generic algorithm, based on a given heuristic, that are able to generate a...
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    Characterization and Nonlinear Modeling of MASMOS® Transistor in Order to Design Power Amplifiers for LTE Applications
    Frederique Simbelie,Sylvain Laurent,Pierre Medrel,Michel Prigent,Raymond Quere,Myrianne Regis,Yann Creveuil
    Symposium on Integrated Circuits and Systems Design (SBCCI)（2016）
    This paper reports on the first experimental characterizations and modeling process of a MASMOS® transistor with a classical model, largely used for the modeling of other transistors. From DC IV and S-parameters measurements a large signal model (LSM) has been carried out. The gr...
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    A Compact Low-Distortion Low-Power Instrumentation Amplifier
    Jader A. De Lima
    Symposium on Integrated Circuits and Systems Design (SBCCI)（2009）
    A CMOS instrumentation amplifier based on a simple topology that comprises a double-input G m -stage and a low-distortion class-AB output stage is presented. Sub-threshold design techniques are applied to attain high figures of differential-gain and rejection parameters. Analyses...
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    Highly Integrated Active Dual Response Filter
    R. Lababidi,F. Le Roy,D. Le Jeune,A. Mansour,J. Lintignat,A. Louzir
    Symposium on Integrated Circuits and Systems Design (SBCCI)（2015）
    This work focuses on the design of a novel compact Active Dual Response Filter within a single device which allows ensuring the coexistence of three different standards while proposing an optimal structure in terms of response and space. The proposed filter is based on a highly s...
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    A Detailed Electrical Analysis of SEE on 28 Nm FDSOI SRAM Architectures
    Cleiton M. Marques,Leonardo H. Brendler,Frederic Wrobel,Alexandra L. Zimpeck, Walter E. C. Bartra,Paulo F. Butzen,Cristina Meinhardt
    Symposium on Integrated Circuits and Systems Design (SBCCI)（2023）
    Building the devices on a Silicon on Insulator layer has proven to be one of the best manufacturing alternatives. However, radiation effects are still a challenge to nanometer technologies. This work evaluates three SRAM cells: 6T, 8T, and DICE considering a 28 nm FDSOI process. ...
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    Power Optimized Viterbi Decoder Implementation Through Architectural Transforms
    J Portela,J Monteiro
    Symposium on Integrated Circuits and Systems Design (SBCCI)（2002）
    Viterbi is an algorithm for error correction in the transmission of messages. It requires coding and decoding stages in the sender and receiver, respectively. These type of algorithms are very useful for the transmission of a type of message where some degree of error in the rece...
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    Dynamic Reconfiguration Behavior Using Generic FPGAs and FPIDs
    RL Zuim,CJN Coelho, LFE Moreira,AO Fernandes, JM da Mata,DC da Silva
    Symposium on Integrated Circuits and Systems Design (SBCCI)
    Reconfigurable computers have demonstrated performance advantages over general-purpose processors for some classes of problems. However, some problems need hardware changes while in operation. A technique where a dynamic reconfiguration behavior was achieved using generic FPGA de...
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    Increasing Observability in Post-Silicon Debug Using Asymmetric Omega Networks
    Andre B. M. Gomes,Fredy A. M. Alves,Ricardo S. Ferreira,Jose Augusto M. Nacif
    Symposium on Integrated Circuits and Systems Design (SBCCI)（2015）
    Current pre-silicon verification techniques can not guarantee error free designs for complex integrated circuits during their first fabrication. Some errors are only uncovered when the device is running at full clock speed. Using post-silicon debug techniques, the designer can mo...
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    Self-Adaptive Network on Chips
    Jean-Philippe Diguet
    Symposium on Integrated Circuits and Systems Design (SBCCI)（2013）
    NoC and highly variable traffics will be quite common in future SoCs. Self-Adaptive NoCs provide a solution to optimise energy efficiency and performances at runtime in this uncertain environment. This paper first provides a brief survey of of self-adaptive NoCs. Secondly it pres...
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