刘波 - School of Integrated Circuits, Southeast University

基本信息

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职业迁徙

个人简介

刘波，东南大学集成电路学院副教授，博士生导师。长期从事高能效电路与系统、低功耗芯片设计与应用研究，主持国家自然科学基金、国家重大科技专项课题、国家重点研发计划项目课题等，近三年获企业横向研发经费300余万。在Nature Electronics、Science China Information Sciences、IEEE TCAS-I/II、IEEE Circuits and Systems Magazine、IEEE TCAD、TED、TVLSI、TETC、ISSCC、IEDM、DATE、ISCAS等集成电路设计权威期刊和学术会议中发表论文50余篇。在28nm、22nm等工艺节点成功流片10余款低功耗原型芯片，部分技术已在国内行业领军企业产品中完成验证部署。

研究兴趣

论文共 184 篇作者统计合作学者相似作者

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14.3 A 28nm 17.83-to-62.84tflops/w Broadcast-Alignment Floating-Point CIM Macro with Non-Two's-Complement MAC for CNNs and Transformers

Xing Wang, Tianhui Jiao,Yi Yang, Shaochen Li,Dongqi Li,An Guo, Yuhui Shi,Yuchen Tang,Jinwu Chen,Zhican Zhang, Zhichao Liu,Bo Liu,Weiwei Shan,Xin Wang,Hao Cai, Wenwu Zhu,Jun Yang,Xin Si

IEEE International Solid-State Circuits Conferencepp.254-256, (2025)

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TWDP: A Vision Transformer Accelerator with Token-Weight Dual-Pruning Strategy for Edge Device Deployment

Guang Yang, Xinming Yan, Hui Kou, Zihan Zou, Qingwen Wei,Hao Cai,Bo Liu

Asia and South Pacific Design Automation Conferencepp.177-182, (2025)

引用0浏览0EI引用

14.7 NeuroPilot: A 28nm, 69.4fj/node and 0.22ns/node, 32×32 Mimetic-Path-Searching CIM-Macro with Dynamic-Logic Pilot PE and Dual-Direction Searching

An Guo,Jingmin Zhang,Xingyu Pu,Yi Yang, Defa Wu,Yuchen Tang, Yuhui Shi, Yinghai Gao, Zhichao Liu,Bo Wang,Tianzhu Xiong, Zhaoyang Zhang,Xi Chen,Jinwu Chen, Feiran Liu, Xing Wang,Xinning Liu,Weiwei Shan,Bo Liu,Hao Cai,Xin Si,Jun Yang

IEEE International Solid-State Circuits Conferencepp.1-3, (2025)

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A 52.03TOPS/W DCIM-Based Accelerator with FlashAttention and Sparsity-Aware Alignment for LLMs

Bo Liu, Xingyu Xu, Yang Zhang, Xilong Kang, Qingwen Wei, Zihan Zou,Jun Yang,Hao Cai,Xin Si

2025 IEEE Custom Integrated Circuits Conference (CICC)pp.1-3, (2025)

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Application of Dynamic Enhanced Scanning with GD-EOB-DTPA MRI Based on Deep Learning Algorithm for Lesion Diagnosis in Liver Cancer Patients

Bo Liu, Jinhua Yang, Yifei Wu,Xi Chen, Xueru Wu

FRONTIERS IN ONCOLOGY (2025)

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A 40nm 4mb High-Reliability STT-MRAM Achieving 18ns Write-Time and 94.9% Wafer-Level-Die-Yield Across -55°C-to-125°c

Yaoru Hou, Haoran Du, Jiongzhe Su, Yibo Liu, Zhenghan Fang, Jia-le Cui, Shuyu Wang, Chenxing Liu-Sun, Xuezhao Wu, Zhihua Xiao,Bo Liu,Xin Si,Jun Yang,Qiming Shao,Hao Cai

2025 IEEE Custom Integrated Circuits Conference (CICC)pp.1-3, (2025)

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14.6 A 28nm 64kb Bit-Rotated Hybrid-CIM Macro with an Embedded Sign-Bit-Processing Array and a Multi-Bit-Fusion Dual-Granularity Cooperative Quantizer