C. Dachs - University of Montpellier II

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论文共 33 篇作者统计合作学者相似作者

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Impact of Downscaling and Poly-Gate Depletion on the RF Noise Parameters of Advanced Nmos Transistors

S Nuttinck,AJ Scholten,LF Tiemeijer,F Cubaynes,C Dachs,C Detcheverry,EA Hijzen

IEEE Transactions on Electron Devices（2006）

引用7浏览0EIWOS引用

Triple Junctions for Reduced Impact of Offset Spacer Variation on CMOS Device Parameters

M Jurczak,R Rooyackers,A De Keersgieter,E Kunnen,K Henson,O Richard,C Dachs

ESSDERC 2004 PROCEEDINGS OF THE 34TH EUROPEAN SOLID-STATE DEVICE RESEARCH CONFERENCEpp.145-148, (2004)

引用1浏览0EIWOS引用

Diffusion-less Junctions and Super Halo Profiles for PMOS Transistors Formed by SPER and FUSI Gate in 45 Nm Physical Gate Length Devices

S Severi,KG Anil,JB Pawlak,R Duffy,K Henson,R Lindsay,A Lauwers,A Veloso,JF de Marneffe,J Ramos, RA Camillo-Castillo,P Eyben,C Dachs,W Vandervost,M Jurczak,S Biesemans,K De Meyer

IEDM Technical Digest IEEE International Electron Devices Meeting, 2004

引用27浏览0EIWOS引用

45 Nm Nmosfet with Metal Gate on Thin SiON Driving 1150 /spl Mu/a//spl Mu/m and Off-State of 10na//spl Mu/m

K. Henson, R. Lander,M. Demand,C. Dachs,B. Kaczer,W. Deweerd,T. Schram,Z. Tokei, J. Hooker,F. Cubaynes,S. Beckx,W. Boullart,B. Coenegrachts,J. Vertommen,O. Richard,H. Bender,W. Vandervorst,M. Kaiser, J. Everaert,M. Jurczak,S. Biesemans

semanticscholar（2004）

引用0浏览0引用

Ultra-Thin Oxynitride Gate Dielectrics by Pulsed-Rf Dpn for 65 Nm General Purpose Cmos Applications

A Veloso,FN Cubaynes,A Rothschild,S Mertens,R Degraeve,R O'Connor,C Olsen,L Date,M Schaekers,C Dachs,M Jurczak

ESSDERC 2003 PROCEEDINGS OF THE 33RD EUROPEAN SOLID-STATE DEVICE RESEARCH CONFERENCE（2003）

引用13浏览0EIWOS引用

CMOS Scaling Beyond the 90 Nm CMOS Technology Node: Shallow Junction and Integration Challenges

C. Dachs,R. Surdeanu,Bartek Pawlak,G. Doornbos,Ray Duffy,A. Heringa,Y.V. Ponomarev,V. C. Venezia,Mark van Dal,P.A. Stolk,Richard Lindsay,K. Henson,B Dieu,Luc Geenen,I. Hoflijk,Olivier Richard,Trudo Clarysse,Bert Brijs,Wilfried Vandervorst, Xavier Llimona i Pagès

openalex（2003）

引用0浏览0引用

A Practical Baseline Process for Advanced CMOS Devices Research [Sub-50 Nm MOSFETs]

YV Ponomarev,JJGP Loo,ZM Rittersma,RJP Lander,JC Hooker,G Doornbos,R Surdeanu,FN Cubaynes,C Dachs,S Kubicek,K Henson,R Lindsay

ESSDERC 2003 PROCEEDINGS OF THE 33RD EUROPEAN SOLID-STATE DEVICE RESEARCH CONFERENCE（2003）

引用0浏览0EIWOS引用

Modeling Facet Formation for Non-Planar Thermal Oxidation of Silicon

Moroz, V.,Dachs, C., Schoonveld, A.

crossref（2001）

引用6浏览0EIWOS引用

A Manufacturable 25 Nm Planar MOSFET Technology

YV Ponomarev,JJGP Loo,C Dachs,FN Cubaynes,MA Verheijen,M Kaiser,JGM van Berkum,S Kubicek, J Bolk, M Rovers

2001 Symposium on VLSI Technology Digest of Technical Papers (IEEE Cat No01 CH37184)

引用8浏览0EIWOS引用

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