Chien-Chou Chen - Electronics and Optoelectronics Research Laboratories, Industrial Technology Research Institute (ITRI)

基本信息

Career Trajectory

Bio

Chien-Chou Chen was born in Taiwan, R.O.C., in 1978. He received the B.S. degree in electrical engineering from Kun Shan University of Technology, Tainan, Taiwan, R.O.C., in 1999 and the M.S. degree in electrical engineering from National Chung Cheng University, Chia-Yi, Taiwan, R.O.C., in 2002. His research interests include the color design of plasma display panels, especially for driving circuits.

Research Interests

Papers共 23 篇Author StatisticsCo-AuthorSimilar Experts

By YearBy Citation主题筛选期刊级别筛选合作者筛选合作机构筛选

An Innovative Bumpless Stacking with Through Silicon Via for 3D Wafer-on-Wafer (WOW) Integration

Sue-Chen Liao,Erh-Hao Chen,Chien-Chou Chen,Shang-Chun Chen,Jui-Chin Chen,Po-Chih Chang,Yiu-Hsiang Chang,Cha-Hsin Lin,Tzu-Kun Ku,Ming-Jer Kao,Young Suk Kim,Nobuhide Maeda,Shoichi Kodama,Hideki Kitada, Koji Fujimoto,Takayuki Ohba

2014 IEEE 64th Electronic Components and Technology Conference (ECTC)（2014）

Cited3Views0EIWOSBibtex

A Study of Blog Networks to Determine Online Social Network Properties from the Tie Strength Perspective

Terry Hui-Ye Chiu,Chien-Chou Chen,Yuh-Jzer Joung, Shymin Chen

Online Information Review（2014）

Cited18Views0EIBibtex

Fine-pitch Backside Via-Last TSV Process with Optimization on Temporary Glue and Bonding Conditions

Erh-Hao Chen,Tzu-Chien Hsu,Cha-Hsin Lin,Pei-jer Tzeng,Chung-Chih Wang,Shang-Chun Chen,Jui-Chin Chen,Chien-Chou Chen,Yu-Chen Hsin,Po-Chih Chang,Yiu-Hsiang Chang, Shin-Chiang Chen,Yu-Ming Lin,Sue-Chen Liao,Tzu-Kun Ku

2013 IEEE 63rd Electronic Components and Technology Conference（2013）

Cited19Views0EIWOSBibtex

Study of TSV Filling Performance with Wide-Range Pattern Densities by Using a Novel Plating Chamber with Surface Paddle Agitation

Shang-Chun Chen,Yiu-Hsiang Chang,Yu-Chen Hsin,Chien-Chou Chen,Jui-Chin Chen,Po-Chih Chang,Pei-Jer Tzeng,Sue-Chen Liao, Shin-Chiang Chen,Chung-Chih Wang,Tzu-Chien Hsu,Yu-Ming Lin,Erh-Hao Chen,Cha-Hsin Lin,Tzu-Kun Ku

International Symposium on VLSI Technology, Systems, and Applications（2013）

Cited2Views0EIWOSBibtex

Barrier heights engineering of Al/p-Si Schottky contact by a thin organic interlayer

Wen Chang Huang,Tien-Chai Lin,Chia-Tsung Horng,Chien-Chou Chen

Microelectronic Engineering (2013): 200-204

Cited41Views0EIBibtex

Challenges Of Cu Cmp Of Tsvs And Rdls Fabricated From The Backside Of A Thin Wafer

Jui-Chin Chen,John H. Lau,Tzu-Chien Hsu,Chien-Chou Chen,Pei-Jer Tzeng,Po-Chih Chang,Chun-Hsien Chien,Yiu-Hsiang Chang,Shang-Chun Chen,Yu-Chen Hsin,Sue-Chen Liao,Cha-Hsin Lin,Tzu-Kun Ku,Ming-Jer Kao

2013 IEEE INTERNATIONAL 3D SYSTEMS INTEGRATION CONFERENCE (3DIC)（2013）

Cited6Views0EIWOSBibtex

Design, Fabrication, and Calibration of Stress Sensors Embedded in a TSV Interposer in a 300mm Wafer

Pei-Jer Tzeng,John H. Lau,Ming-Ji Dai,Sheng-Tsai Wu,Heng-Chieh Chien,Yu-Lin Chao,Chien-Chou Chen,Shang-Chun Chen,Chien-Ying Wu,Ching-Kuan Lee,Chau-Jie Zhan,Jui-Chin Chen,Yi-Feng Hsu,Tzu-Kun Ku,Ming-Jer Kao

2012 IEEE 62ND ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC)（2012）

Cited12Views0EIWOSBibtex

Oxide Liner, Barrier and Seed Layers, and Cu-Plating of Blind Through Silicon Vias (tsvs) on 300mm Wafers for 3D IC Integration

Chien-Ying Wu,Shang-Chun Chen,Pei-Jer Tzeng,John H. Lau,Yi-Feng Hsu,Jui-Chin Chen,Yu-Chen Hsin,Chien-Chou Chen,Shang-Hung Shen,Cha-Hsin Lin,Tzu-Kun Ku,Ming-Jer Kao

Journal of Microelectronics and Electronic Packaging（2012）

Cited17Views0Bibtex

A thermal performance measurement method for blind through silicon vias (TSVs) in a 300mm wafer

Hengchieh Chien,Y Chao,John H Lau,Ramin Tain,Mingji Dai,Peijer Tzeng,Chahsin Lin,Yuchen Hsin,Shangchun Chen,Juichin Chen,Chienchou Chen,Chihon Ho,Weichung Lo,Tzukun Ku,Mingjer Kao

Electronic Components and Technology Conference（2011）

Cited14Views0EIWOSBibtex

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