Eswar Ramanathan

Eswar Ramanathan received the B.E. degree in EEE from the PSG College of Technology, India, and the M.S. degree in microelectronics from the National University of Singapore, Singapore. He has been with GLOBALFOUNDRIES/Chartered Semiconductor since 2008 in multiple technologies from 45 nm–7 nm in various roles as unit integration process development to module/technology lead. He is currently working in 7-nm BEOL process focusing on yield improvement, and parametric matching. He is experienced in BEOL integrated process modules for local interconnect schemes and for Cu/low k interconnects and their constituent unit process, such as Cu plating, PVD/CVD deposition for local interconnect metallization, Cu liner and seed and low k dielectric materials, Cu, and low k CMP, and reactive ion etch.