Hicks, J.

Jeffrey Hicks (M'13) received the B.S. degree in applied physics from the California Institute of Technology, Pasadena, CA, USA, in 1980. In 1980, he was a Reliability Engineer with Intel's Logic Technology Development Group, Santa Clara, CA, USA, working on bipolar and erasable programmable read-only memory nonvolatile memory technologies. He is a Senior Principle Engineer with Intel's Logic Technology Development Quality and Reliability Group, managing Si technology quality and reliability pathfinding, transistors, and soft error reliability. In his years at Intel to date, he has served in numerous quality and reliability functions, spanning technology development, manufacturing, product, and customer quality and reliability. He is the holder of several patents (received or pending) and has published a number of technical papers. Mr. Hicks was a recipient of the Best Paper Award at the 1999 International Reliability Physics Symposium and of four Intel achievement awards.