基本信息
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Bio
Kiyoshi Takeuchi received the B.S., M.S., and Ph.D. degrees from The University of Tokyo, Tokyo, Japan, in 1984, 1986, and 1989, respectively.
From 1989 to 2015, he was with NEC, NEC Electronics, and Renesas Electronics Corporation, where he was engaged in the research of CMOS/memory devices and circuits from various aspects, including physics, modeling and design. He is currently a Project Researcher with the Institute of Industrial Science, The University of Tokyo. His current research interests are mainly on memory and power electronic devices modeling.
Research Interests
Papers共 139 篇Author StatisticsCo-AuthorSimilar Experts
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2025 IEEE International Reliability Physics Symposium (IRPS)pp.1-6, (2025)
2024 IEEE 17th International Conference on Solid-State & Integrated Circuit Technology (ICSICT)pp.1-3, (2024)
Tomoko Mizutani,Kiyoshi Takeuchi,Takuya Saraya,Hiroshi Oka,Takahiro Mori,Masaharu Kobayashi, Toshiro Hiramoro
2024 IEEE 36TH INTERNATIONAL CONFERENCE ON MICROELECTRONIC TEST STRUCTURES, ICMTS 2024 (2024)
JAPANESE JOURNAL OF APPLIED PHYSICSno. 12 (2024)
IEEJ Transactions on Electronics, Information and Systemsno. 3 (2024): 245-250
2023 35th International Conference on Microelectronic Test Structure (ICMTS)pp.1-4, (2023)
2023 SILICON NANOELECTRONICS WORKSHOP, SNWpp.87-88, (2023)
Extended Abstracts of the 2023 International Conference on Solid State Devices and Materials (2023)
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Author Statistics
#Papers: 139
#Citation: 1316
H-Index: 23
G-Index: 29
Sociability: 6
Diversity: 3
Activity: 10
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