Luis J. Saiz-Adalid

Luis J. Saiz-Adalid is M.Sc. (1995) and Ph.D (2015) in Computer Engineering from the Universitat Politècnica de València (UPV), Spain. After 15 years in the industry (IBM, 1995-Celestica, 1998), he is currently an associate professor in the Department of Computer Engineering (DISCA) at the UPV. He is a member with the Fault-Tolerant Systems (STF) research line within the Institute of Information and Communication Technologies (ITACA) from the UPV. His research interests include design and implementation of digital systems, design and validation of Fault-Tolerant Systems and design of Error Control Codes.