Michele Stucchi

Michele Stucchi received the master’s degree in electrical engineering from the University of Bari, Bari, Italy, in 1988. From 1989 to 1991, he worked as an Interconnect and Silicide Process Engineer for Dynamic Random Access Memory (DRAM) Plant of Texas Instruments, Avezzano, Italy. From 1991 to 1996, he worked as an Engineer in failure analysis, focused ion beam (FIB) analysis, and in electrostatic discharge (ESD), and latch-up characterization of IC devices in Tecnopolis Science Park, Bari. In 1996, he joined the Interuniversity Microelectronics Centre (IMEC), Leuven, Belgium, where he has worked in the field of electrical characterization of silicides and advanced Cu-low K interconnects. From 2004 to 2006, he managed the Technology-Aware Design Research Program at IMEC. For some years, he was a Team Leader of reliability and electrical and functional test teams. He is currently a Principal Member of Technical Staff in characterization, modeling, and reliability aspects of 2-D- and 3-D-ICs interconnects. He has coauthored about 140 articles published in journals and conference proceedings.