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5.1 POWER8TM: A 12-Core Server-Class Processor in 22nm SOI with 7.6tb/s Off-Chip Bandwidth

Eric J. Fluhr,Joshua Friedrich,Daniel M. Dreps,Victor V. Zyuban,Gregory S. Still,Christopher J. Gonzalez,Allen Hall,David Hogenmiller,Frank Malgioglio,Ryan Nett,Jose Paredes,Juergen Pille,Donald W. Plass,Ruchir Puri,Phillip Restle,David Shan,Kevin Stawiasz,Zeynep Toprak Deniz,Dieter F. Wendel,Matthew M. Ziegler

ISSCC（2014）

Cited 119|Views8
Key words
DRAM chips,microprocessor chips,silicon-on-insulator,12-core server-class processor,BEOL,IBM eDRAM SOI technology,POWER8,UTM,analog designs,capacitance 31.5 muF,deep-trench decoupling capacitance,high-voltage I/O,low-latency communication,low-resistance distribution,microarchitectural enhancements,off-chip bandwidth,power-performance tuning,size 22 nm,size 32 nm,socket performance,thin-oxide transistor,transistors,ultra-thick-metal pitch layers
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