Soft Errors and NBTI in SiGe Pmos Transistors
2014 12TH IEEE INTERNATIONAL CONFERENCE ON SOLID-STATE AND INTEGRATED CIRCUIT TECHNOLOGY (ICSICT)（2014）
Key words
CMOS integrated circuits,Ge-Si alloys,MOSFET,elemental semiconductors,interface states,radiation hardening (electronics),semiconductor device reliability,silicon,CMOS devices,NBTI,Si,SiGe,interface-trap buildup,negative bias-temperature stress,negative-bias instabilities,oxide-trap charge buildup,pMOS transistors,pMOSFET,single event charge collection,single-event transient pulse polarity,soft errors
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