The Impact of Substrate Bias on Proton Damage in 130 Nm CMOS Technology
NSREC 2005 IEEE RADIATION EFFECTS DATA WORKSHOP, WORKSHOP RECORD（2005）
Key words
CMOS integrated circuits,elemental semiconductors,integrated circuit testing,proton effects,silicon,130 nm,180 nm,CMOS technology,Si,ac properties,dc properties,proton damage,proton irradiation effects,substrate bias
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