The RTN Measurement Technique on Leakage Path Finding in Advanced High-K Metal Gate CMOS Devices
2015 IEEE 22nd International Symposium on the Physical and Failure Analysis of Integrated Circuits（2015）
Natl Chiao Tung Univ
Abstract
In this paper, the evolution of BTI induced leakage paths has been evaluated by I g -RTN technique and demonstrated on HK/MG CMOS devices. First, RTN measurement has been elaborated to identify the location of traps and their correlation to the leakage current. Then, the measured gate current transient can be used to analyze the formation of breakdown path. The results show that the evolution of leakage paths can be divided into three stages, i.e., (1) the early stage-only gate leakage and discrete RTN traps are observed, (2) the middle stage - the traps interacting with the percolation paths and exhibits a multi-level current-variation, and (3) the last stage - the formation of breakdown path. These findings provide useful information on the understanding of gate dielectric breakdown in high-k CMOS devices.
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Key words
random telegraph noise,RTN measurement technique,leakage path finding,high-k metal gate CMOS devices,HK/MG CMOS devices,bias temperature instability,BTI induced leakage path,traps location,leakage current,gate current transient,gate dielectric breakdown,high-k CMOS devices
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