7.1 256gb 3b/cell V-NAND Flash Memory with 48 Stacked WL Layers
IEEE International Solid-State Circuits Conference（2016）
Key words
nonvolatile memory,3D technology,SSD market,cell-to-cell interference problem,atomic layer,charge trapping,market-driven WL stack requirement,total mold height reduction,channel hole critical dimension variation,mold stack height,WL resistance variation,V-NAND flash memory
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