PPAC Scaling Enablement for 5nm Mobile SoC Technology
2017 47th European Solid-State Device Research Conference (ESSDERC)(2017)
Key words
5nm,More Moore scaling,process technology,integration,finFET,gate-all-around,nanowire,PPAC
AI Read Science
Must-Reading Tree
Example

Generate MRT to find the research sequence of this paper
Chat Paper
Summary is being generated by the instructions you defined