Co-process Technology of the TSV and Embedded IC for 3D Heterogeneous IC Integration
2015 IEEE 17th Electronics Packaging and Technology Conference (EPTC)（2015）
Key words
coprocess technology,TSV,embedded IC,3D heterogeneous IC integration,through silicon via,silicon cavities,organic lamination,insulation layer,laser drilling process,via interconnections,thick laminated organic,thin film passive devices,size 70 mum,size 180 mum
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