High-performance, Cost-Effective 2z Nm Two-Deck Cross-Point Memory Integrated by Self-Align Scheme for 128 Gb SCM
2018 IEEE INTERNATIONAL ELECTRON DEVICES MEETING (IEDM)（2018）
Key words
low raw bit error rate,two-deck storage class memory,SCM,one selector one memory,2z nm 1S1M structure,unit MAT size,cost-effective cross-point memory,self-align scheme,cost-effective 2z nm two-deck cross-point,high reliabilities,low latencies,low leakage current,new phase change materials,integration technology,time 300.0 ns,time 100.0 ns
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