Design and Test of a GBTX-Based Board for the Upgrade of the ALICE TOF Readout Electronics

In order to cope with the increased luminosity that the European Organization for Nuclear Research large hadron collider accelerator will provide after Long Shutdown 2 (2019-2020), the a large ion collider experiment (ALICE) Time-OfFlight (TOF) readout board data readout module is currently being redesigned. As a first step toward the final design, a test board hosting a Microsemi Igloo2 field-programmable gate array (FPGA), the radiation-hard Application-Specified Integrated Circuit (ASIC) gigabit transceiver ASIC (GBTX), and the optical transceiver versatile link transceiver (VTRX) has been designed and extensively tested. The basic idea is to use the GBTX ASIC for performing data transmission, trigger distribution, and clock forwarding toward the front-end electronics. Slow control links are implemented via an on-board advanced risc machine processor Ethernet link and via a 1.25-Gbps optical fiber using the Igloo2 FPGA internal serializer/deserializer. The board is going to work in a moderately hostile environment, having to face a total dose of 0.13 krads in ten years and a flux of 0.26 kHz/cm(2) of hadrons with energy above 20 MeV. The test board has extensively been tested with a special attention dedicated to the Igloo2-GBTX-VTRX devices. An upper bound estimation of the optical link bit error rate lower than 10(-14) is given, together with a measurement of the jitter of the GBTX output clock (around 55.3 ps peak-to-peak value), since this is a very crucial parameter for the TOF detector. The performances obtained by connecting the test board to a computer using the standard ALICE data acquisition board (named C-RORC) are also reported.