High-Performance Acceleration of 2-D and 3-D CNNs on FPGAs Using Static Block Floating Point.

Hongxiang Fan,Shuanglong Liu,Zhiqiang Que,Xinyu Niu,Wayne Luk

IEEE TRANSACTIONS ON NEURAL NETWORKS AND LEARNING SYSTEMS（2023）

Cited 4|Views96

Key words

Quantization (signal),Hardware,Convolution,Field programmable gate arrays,Arithmetic,Tools,Optimization,Field-programmable gate array (FPGA),static block floating point (BFP),three-dimensional convolutional neural network (3-D CNN)

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