Two Dimensional Modeling of Dual Material Double Gate TFET in Stacked Hetero-Dielectrics with Split High-K Materials
2022 IEEE International Conference of Electron Devices Society Kolkata Chapter (EDKCON)(2022)
Department of ECE
Abstract
this article develops the analytical modelling of a dual material double gate TFET including gate engineering using a hetero–dielectric gate stack with split high K dielectrics. The parabolic approximation method of charge potential is used to solve 2D Poisson equation. The dielectric stack of gate consists of SiO2 and split high–K materials. The study incorporates the effect of various high-K dielectrics stacked above dielectric and find its influences on band to band tunneling, OFF and ON currents, energy band bending and drain currents. It is evident that the proposed device structure offers a low OFF current (10 -17 A/µm) and enhances the ON current. The numerical results are simulated using SILVACO ATLAS simulation software.
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Key words
DGTFET,hetero-dielectric,Split gate,stacked gate oxide,High K
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