A 9mb HZO-Based Embedded FeRAM with 1012-Cycle Endurance and 5/7ns Read/Write Using ECC-Assisted Data Refresh and Offset-Canceled Sense Amplifier
2023 IEEE International Solid-State Circuits Conference (ISSCC)（2023）
Key words
BER,CMOS process compatibility,code storage,data refresh,data retention,data storage,ECC,ECC-WD,embedded nonvolatile memory,eNVM,ferroelectric random-access memory,nonvolatile FeRAM chip,offset-canceled sense amplifier,read bit-error rate,remnant polarization,temperature-aware write-voltage driver,voltage 3.0 V
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