CMOS Scaling Beyond the 90 Nm CMOS Technology Node: Shallow Junction and Integration Challenges
C. Dachs,R. Surdeanu,Bartek Pawlak,G. Doornbos,Ray Duffy,A. Heringa,Y.V. Ponomarev,V. C. Venezia,Mark van Dal,P.A. Stolk,Richard Lindsay,K. Henson,B Dieu,Luc Geenen,I. Hoflijk,Olivier Richard,Trudo Clarysse,Bert Brijs,Wilfried Vandervorst, Xavier Llimona i Pagès openalex（2003）
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