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V2Va: an Efficient Verilog-to-Verilog-A Translator for Accelerated Mixed-Signal Simulation

Yicong Shao,Chao Wang,Jiajie Huang,Wangzilu Lu,Zhiwen Gu, Longfan Li, Yuhang Zhang,Jian Zhao,Wei Mao,Yongfu Li

Asia Pacific Conference on Circuits and Systems(2023)

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关键词
Verilog,Verilog-A,Mixed-signal Simulation,abstract syntax tree,translator,generator
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