A 28nm 16kb Aggregation and Combination Computing-in-Memory Macro with Dual-level Sparsity Modulation and Sparse-Tracking ADCs for GCNs

Zhaoyang Zhang, Yanqi Zhang, Feiran Liu, Zhichao Liu, Yinhai Gao, Yuchen Ma,Yutong Zhang,An Guo,Tianzhu Xiong,Jinwu Chen,Xi Chen,Bo Wang,Yuchen Tang,Jun Yang,Xin Si

IEEE JOURNAL OF SOLID-STATE CIRCUITS（2024）

引用 53|浏览34

关键词

Computer architecture,In-memory computing,Common Information Model (computing),Energy efficiency,Optimization,Microprocessors,Arrays,Sparse matrices,Silicon,Parallel processing,Aggregation,artificial intelligence,compact 6T SRAM,computing-in-memory (CIM),graph convolutional networks (GCNs),sparsity

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