Record Performance in GAA 2D NMOS and PMOS Using Monolayer MoS2 and WSe2 with Scaled Contact and Gate Length

W. Mortelmans, P. Buragohain,C. Rogan, A. Kitamura,C. J. Dorow,K. P. O'Brien,R. Ramamurthy, J. Lux, T. Zhong, S. Harlson, E. Gillispie, T. Wilson,Adedapo Oni,A. Penumatcha, M. S. Kavrik,K. Maxey, A. Kozhakhmetov,C. C. Lin, S. Lee, A. Vyatskikh,N. Arefin,P. Fischer, J. Kevek,T. Tronic,M. Metz,S. B. Clendenning,U. Avci

Symposium on VLSI Technology（2024）

Cited 0|Views9

Key words

2D CMOS,2D FET,2D,TMD,MoS2,WSe2

AI Read Science

Must-Reading Tree

Example

Generate MRT to find the research sequence of this paper

Chat Paper

Summary is being generated by the instructions you defined