Stacked Channel Transistors with 2D Materials: an Integration Perspective
2024 IEEE International Electron Devices Meeting (IEDM)（2024）
Key words
2D Materials,Transistor Channel,Discharge Process,Monolayer MoS2,Subthreshold Swing,Metal Gate,Gate Length,High Gate,Gate Stack,SEM Images,Mechanical Forces,Elemental Mapping,Protective Layer,Contact Resistance,Transition Metal Dichalcogenides,Chemical Warfare,Simple Flow,Sacrificial Layer,Monolayer Transition Metal Dichalcogenides,On-off Ratio,Edge Contact,Monolayer WSe2,Cross-sectional TEM
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