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An 8-Bit 4-Gs/s Single-Channel Two-Step ADC Featuring Non-Symmetrical Pipeline Timing and Hybrid-Loop Amplifier

Chenghao Zhang,Maliang Liu,Yuan Chang, Yihang Yang, Jinhai Xiao,Yintang Yang,Yuanjin Zheng,Yong Chen

IEEE Transactions on Very Large Scale Integration (VLSI) Systems(2025)

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关键词
Analog-to-digital converter (ADC),CMOS,gated-ring oscillator (GRO),hybrid,pipelined,time-domain (TD)
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