14.6 A 28nm 64kb Bit-Rotated Hybrid-CIM Macro with an Embedded Sign-Bit-Processing Array and a Multi-Bit-Fusion Dual-Granularity Cooperative Quantizer

Xi Chen, Shaochen Li,Zhican Zhang, Wentao Zheng, Xiao Tan,Yuchen Tang, Yuhui Shi,Lizheng Ren, Yibo Mai, Feiran Liu,Jinwu Chen, Zhaoyang Zhang,An Guo,Tianzhu Xiong,Bo Wang,Xinning Liu,Weiwei Shan,Bo Liu,Hao Cai,Jun Yang,Xin Si

IEEE International Solid-State Circuits Conference（2025）

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Key words

Quantum,Energy Efficiency,Ergogenic,Per Cycle,Accuracy Loss,Hybrid Structure,Rights Groups,Hardware Cost,Partial Sums,Most Significant Bit,Definition Of Boundaries,Weight Map,Left Off,Hardware Overhead,Capacitance Ratio,Static Weight,Compensation Capacitor

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